1. Field of Invention
The present invention relates to a wafer packaging method.
2. Description of Related Art
In manufacture of an image sensor chip, e.g., a CMOS chip, on a wafer, an optical glass sheet is often used to cover the surface of the wafer for protection, to avoid dust attaching on the image sensing region of the wafer. However, as a chip diced from the wafer and used in an electrical product, the chip is aligned with a light-transmissive sheet, which is usually disposed on the housing of the electrical product and has the protection ability of the light-transmissive sheet similar with that of the optical glass sheet on the surface of the chip.
In case the surface of the wafer is not covered by the optical glass sheet, the light transmittance of the wafer may be improved, so as the image sensing ability of the diced chip. However, in that the thickness of the wafer is significantly thin (e.g., around 150 μm), the wafer having ball grid array (BGA) is very difficult for the movement. For example, after the grinding of the wafer having the optical glass sheet, the BGA can be formed on a surface of the wafer opposite to the optical glass sheet. Thereafter, the wafer having the optical glass sheet is placed on the tape of an iron frame and then diced. The optical glass sheet can provide a supporting force to the wafer, to prevent the wafer from cracking by warpage. If the surface of the wafer has no the optical glass sheet, the wafer, frame in the placement of the wafer on the iron frame, is easily cracked due to warpage, or hardly to precisely place on the tape of the iron.
In addition, when the surface of the wafer has the optical glass sheet, an upper surface of a conductive pad located on the edge of the wafer is required to be electrically connected to a conductive wire. In this regard, the region above the conductive pad cannot be covered by the optical glass sheet. As a result, after the process of bonding, such as Dam On Glass (DOG), of the optical glass sheet to the wafer the conductive pad of the wafer is contaminated during a subsequent dicing process or a chemical liquid process, so as to reduce the yield rate of the wafer.